View ADEL2020AR-20_679353.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a improved second source to the el2020 adel2020 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 connection diagrams 8-pin plastic mini-dip (n) 20-pin small outline package 1 8 4 5 3 6 2 7 adel2020 top view v+ output bal bal ?n +in v disable v+ output bal bal ?n +in v disable nc nc nc nc nc nc nc nc nc nc nc nc nc = no connect 1 20 4 17 3 18 5 16 8 13 7 14 6 15 9 12 10 11 2 19 adel2020 top view features ideal for video applications 0.02% differential gain 0.04 8 differential phase 0.1 db bandwidth to 25 mhz (g = +2) high speed 90 mhz bandwidth (C3 db) 500 v/ m s slew rate 60 ns settling time to 0.1% (v o = 10 v step) low noise 2.9 nv/ ? hz input voltage noise low power 6.8 ma supply current 2.1 ma supply current (power-down mode) high performance disable function turn-off time of 100 ns input to output isolation of 54 db (off state) product description the adel2020 is an improved second source to the el2020. this op amp improves on all the key dynamic specifications while offering lower power and lower cost. the adel2020 of- fers 50% more bandwidth and gain flatness of 0.1 db to beyond 25 mhz. in addition, differential gain and phase are less than 0.05% and 0.05 while driving one back terminated cable (150 w ). the adel2020 offers other significant improvements. the most important of these is lower power supply current, 33% less 100k 1m 100m 10m +0.1 0 ?.1 ?.1 0 +0.1 normalized gain ?db frequency ?hz r l = 150 r l = 1k ?5v ?v ?5v ?v w fine-scale gain (normalized) vs. frequency for various supply voltages. r f = 750 w , gain = +2 than the competition while offering higher output drive. impor- tant specs like voltage noise and offset voltage are less than half of those for the el2020. the adel2020 also features an improved disable feature. the disable time (to high output impedance) is 100 ns with guaran- teed break before make. finally the adel2020 is offered in the industrial temperature range of C40 c to +85 c in both plastic dip and soic package. 0.10 0 15 0.03 0.01 6 0.02 5 0.06 0.04 0.05 0.07 0.08 0.09 14 13 12 11 10 9 8 7 0.20 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 gain phase gain = +2 r f = 750 r l = 150 f c = 3.58mhz 100 ire modulated ramp supply voltage ??volts differential gain ?% differential phase ?degrees w w differential gain and phase vs. supply voltage
adel2020Cspecifications adel2020a parameter conditions temperature min typ max units input offset voltage 1.5 7.5 mv t min Ct max 2.0 10.0 mv offset voltage drift 7 m v/ c common-mode rejection v cm = 10 v v os t min Ct max 50 64 db input current t min Ct max 0.1 1.0 m a/v power supply rejection v s = 4.5 v to 18 v v os t min Ct max 65 72 db input current t min Ct max 0.05 0.5 m a/v input bias current Cinput t min Ct max 0.5 7.5 m a +input t min Ct max 115 m a input characteristics +input resistance 1 10 m w Cinput resistance 40 w +input capacitance 2pf open-loop transresistance v o = 10 v r l = 400 w t min Ct max 1 3.5 m w open-loop dc voltage gain r l = 400 w , v out = 10 v t min Ct max 80 100 db r l = 100 w , v out = 2.5 v t min Ct max 76 88 db output voltage swing r l = 400 w t min Ct max 12.0 13.0 v short-circuit current 150 ma output current t min Ct max 30 60 ma power supply operating range 3.0 18 v quiescent current t min Ct max 6.8 10.0 ma power-down current t min Ct max 2.1 3.0 ma disable pin current disable pin = 0 v t min Ct max 290 400 m a min disable pin current to disable t min Ct max 30 m a dynamic performance 3 db bandwidth g = +1; r fb = 820 90 mhz g = +2; r fb = 750 70 mhz g = +10; r fb = 680 30 mhz 0.1 db bandwidth g = +2; r fb = 750 25 mhz full power bandwidth v o = 20 v p-p, r l = 400 w 8 mhz slew rate r l = 400 w , g = +1 500 v/ m s settling time to 0.1% 10 v step, g = C1 60 ns differential gain f = 3.58 mhz 0.02 % differential phase f = 3.58 mhz 0.04 degree input voltage noise f = 1 khz 2.9 nv/ ? hz input current noise Ci in , f = 1 khz 13 pa/ ? hz +i in , f = 1 khz 1.5 pa ? hz output resistance open loop (5 mhz) 15 w specifications subject to change without notice. rev. a C2C (@ t a = +25 8 c and v s = 6 15 v dc, r l = 150 w unless otherwise noted)
adel2020 rev. a C3C maximum power dissipation the maximum power that can be safely dissipated by the adel2020 is limited by the associated rise in junction tem- perature. for the plastic packages, the maximum safe junction temperature is 145 c. if the maximum is exceeded momen- tarily, proper circuit operation will be restored as soon as the die temperature is reduced. leaving the device in the over- heated condition for an extended period can result in device burnout. to ensure proper operation, it is important to observe the derating curves below. while the adel2020 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature is not exceeded under all conditions. 2.4 0.4 100 1.0 0.6 ?0 0.8 ?0 1.6 1.2 1.4 1.8 2.0 2.2 80 60 40 20 0 ambient temperature ? c total power dissipation ?watts 8-pin mini-dip 20-pin soic maximum power dissipation vs. temperature absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 . . . . . . . observe derating curves output short circuit duration . . . . observe derating curves common-mode input voltage . . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 v storage temperature range plastic dip and soic . . . . . . . . . . . . . . . C65 c to +125 c operating temperature range . . . . . . . . . . C40 c to +85 c lead temperature range (soldering 60 sec) . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 8-pin plastic package: q ja = 90 c/watt 20-pin soic package: q ja = 150 c/watt esd susceptibility esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. although the adel2020 features esd protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid any performance degradation or loss of functionality. 1 5 7 3 2 3 0.1? +v s 4 6 adel2020 0.1? ? s 10k w offset null configuration ordering guide temperature package package model range description option adel2020an C40 c to +85 c 8-pin plastic dip n-8 ADEL2020AR-20 C40 c to +85 c 20-pin plastic soic r-20 ADEL2020AR-20-reel C40 c to +85 c 20-pin plastic soic r-20
adel2020 rev. a C4C 7 3 2 3 0.1? +v s 6 adel2020 ? s 1k w 4 0.1? r l r t v in v o figure 1. connection diagram for a vcl = +1 frequency ?mhz 0 ? 10 100 ? ? ? ? 1 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 gain = +1 r l = 150 v s = ?5v ?v v s = ?5v ?v phase gain closed-loop gain ?db phase shift ?degrees w figure 2. closed-loop gain and phase vs. frequency, g = + 1, r l = 150 w , r f = 1 k w for 15 v, 910 w for 5 v 110 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts g = +1 r l = 150 v o = 250mv p-p peaking 1db r f = 750 peaking 0.1db r f = 1k r f = 1.5k w w w w figure 4. C3 db bandwidth vs. supply voltage, gain = +1, r l = 150 w 0 ? ? ? ? ? 1 closed-loop gain ?db 0 ?5 ?0 ?35 ?80 ?25 ?70 phase shift ?degrees gain = +1 r l = 1k phase gain v s = ?5v ?v v s = ?5v ?v frequency ?mhz 10 100 1 1000 w figure 3. closed-loop gain and phase vs. frequency, g = +1, r l = 1 k w , r f = 1 k w for 15 v, 910 w for 5 v
adel2020 rev. a C5C 7 3 2 3 0.1? +v s 6 adel2020 ? s 681 w 4 0.1? r l v in v o 681 w figure 5. connection diagram for a vcl = C1 gain = ? r l = 150 w 180 135 90 45 0 phase shift ?degrees 0 ? ? ? ? ? 1 closed-loop gain ?db frequency ?mhz 10 100 1 1000 v s = ?5v ?v v s = ?5v ?v phase gain ?5 figure 6. closed-loop gain and phase vs. frequency, g = C1, r l = 150 w , r f = 680 w for 15 v, 620 w for 5 v gain = ? r l = 1k w phase shift ?degrees 0 ? ? ? ? ? 1 closed-loop gain ?db phase gain v s = ?5v ?v v s = ?5v ?v frequency ?mhz 10 100 1 1000 180 135 90 45 0 ?5 figure 7. closed-loop gain and phase vs. frequency, g = C1, r l = 1 k w , r f = 680 w for v s = 15 v, 620 w for 5 v 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??volts g = ? r l = 150 v o = 250mv p-p peaking 1.0db r f = 499 peaking 0.1db r f = 1k r f = 681 w w w w figure 8. C3 db bandwidth vs. supply voltage, gain = C1, r l = 150 w
adel2020 rev. a C6C 7 3 2 3 0.1? +v s 6 adel2020 ? s 750 w 4 0.1? r l r t v in v o 750 w figure 9. connection diagram for a vcl = +2 gain = +2 r l = 150 w phase gain frequency ?mhz 10 100 6 1 5 4 3 2 7 1 1000 0 ?5 ?0 ?35 ?80 ?25 ?70 closed-loop gain ?db phase shift ?degrees v s = ?5v ?v v s = ?5v ?v figure 10. closed-loop gain and phase vs. frequency, g = +2, r l = 150 w , r f = 750 w for 15 v, 715 w for 5 v 110 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 ?db bandwidth ?mhz supply voltage ??olts g = +2 r l = 150 v o = 250mv p-p peaking 1.0db r f = 500 peaking 0.1db r f = 750 r f = 1k w w w w figure 12. C3 db bandwidth vs. supply voltage, gain = +2, r l = 150 w frequency ?mhz 10 100 1 1000 closed-loop gain ?db 0 ?5 ?0 ?35 ?80 ?25 ?70 phase shift ?degrees phase gain gain = +2 r l = 1k v s = ?5v ?v v s = ?5v ?v 6 1 5 4 3 2 7 w figure 11. closed-loop gain and phase vs. frequency, g = +2, r l = 1 k w , r f = 750 w for 15 v, 715 w for 5 v
adel2020 rev. a C7C 7 3 2 3 0.1? +v s 6 adel2020 ? s 270 w 4 0.1? r l r t v in v o 30 w figure 13. connection diagram for a vcl = +10 closed-loop gain ?db 0 ?5 ?0 ?35 ?80 ?25 ?70 phase shift ?degrees frequency ?mhz 10 100 1 1000 gain = +10 r f = 270 r l = 150 v s = ?5v ?v v s = ?5v ?v phase gain 20 15 19 18 17 16 21 w w figure 14. closed-loop gain and phase vs. frequency, g = +10, r l = 150 k w 20 15 19 18 17 16 21 closed-loop gain ?db 0 ?5 ?0 ?35 ?80 ?25 ?70 phase shift ?degrees frequency ?mhz 10 100 1 1000 gain = +10 r f = 270 r l = 1k phase gain v s = ?5v ?v v s = ?5v ?v w w figure 15. closed-loop gain and phase vs. frequency, g = +10, r l = 1 k w 40 20 2 30 70 50 60 80 90 100 18 16 14 12 10 8 6 4 peaking 0.5db peaking 0.1db supply voltage ??olts ?db bandwidth ?mhz r f = 232 r f = 442 r f = 1k g = +10 r l = 150 v o = 250mv p-p w w w w figure 16. C3 db bandwidth vs. supply voltage, gain = +10, r l = 150 w
adel2020 rev. a C8C 30 15 0 100k 1m 100m 10m 10 5 20 25 frequency ?hz output voltage ?volts p-p output level for 3% thd v s = ?5v v s = ?v figure 17. maximum undistorted output voltage vs. frequency 80 40 100k 100m 10m 1m 10k 20 60 50 30 10 70 power supply rejection ?db frequency ?hz curves are for worst case condition where one supply is varied while the other is held constant v s = ?5v v s = ?v r f = 715 a v = +2 w figure 18. power supply rejection vs. frequency 100 10 1 100 10 1 10 100 1k 10k 100k inverting input current noninverting input current frequency ?hz voltage noise ?nv/ hz v s = ?v to ?5v current noise ?pa/ hz voltage noise figure 19. input voltage and current noise vs. frequency 10.0 0.01 100k 100m 10m 1m 10k 1.0 0.1 closed-loop output resistance ? w frequency ?hz v s = ?5v v s = ?v gain = 2 r f = 715 w figure 20. closed-loop output resistance vs. frequency 10 4 140 7 5 ?0 6 ?0 9 8 120 80 60 40 100 20 0 ?0 supply current ?ma junction temperature ? c v s = ?5v v s = ?v figure 21. supply current vs. junction temperature 1200 200 2 400 800 600 1000 18 16 14 12 10 8 6 4 slew rate ?v/? supply voltage ??olts r l = 400 gain = ?0 gain = +10 gain = +2 w figure 22. slew rate vs. supply voltage
adel2020 rev. a C9C general design considerations the adel2020 is a current feedback amplifier optimized for use in high performance video and data acquisition systems. since it uses a current feedback architecture, its closed-loop bandwidth depends on the value of the feedback resistor. the C3 db bandwidth is also somewhat dependent on the power supply voltage. lowering the supplies increases the values of in- ternal capacitances, reducing the bandwidth. to compensate for this, smaller values of feedback resistor are used at lower supply voltages. power supply bypassing adequate power supply bypassing can be critical when optimiz- ing the performance of a high frequency circuit. inductance in the power supply leads can contribute to resonant circuits that produce peaking in the amplifiers response. in addition, if large current transients must be delivered to the load, then bypass ca- pacitors (typically greater than 1 m f) will be required to provide the best settling time and lowest distortion. although the rec- ommended 0.1 m f power supply bypass capacitors will be suffi- cient in most applications, more elaborate bypassing (such as using two paralleled capacitors) may be required in some cases. capacitive loads when used with the appropriate feedback resistor, the adel2020 can drive capacitive loads exceeding 1000 pf directly without oscillation. another method of compensating for large load ca- pacitance is to insert a resistor in series with the loop output. in most cases, less than 50 w is all that is needed to achieve an extremely flat gain response. offset nulling a 10 k w pot connected between pins 1 and 5, with its wiper connected to v+, can be used to trim out the inverting input current (with about 20 m a of range). for closed-loop gains above about 5, this may not be sufficient to trim the output off- set voltage to zero. tie the pots wiper to ground through a large value resistor (50 k w for 5 v supplies, 150 k w for 15 v supplies) to trim the output to zero at high closed-loop gains. operation as a video line driver the adel2020 is designed to offer outstanding performance at closed-loop gains of one or greater. at a gain of 2, the adel2020 makes an excellent video line driver. the low differential gain and phase errors and wide C0.1 db bandwidth are nearly inde- pendent of supply voltage and load. for applications requiring widest 0.1 db bandwidth, it is recommended to use 715 w feed- back and gain resistors. this will result in about 0.05 db of peaking and a C0.1 db bandwidth of 30 mhz on 15 v supplies. disable mode by pull ing the voltage on pin 8 to common (0 v), the adel2020 can be put into a disabled state. in this condition, the supply current drops to less than 2.8 ma, the output becomes a high impedance, and there is a high level of isolation from input to output. in the case of a line driver for example, the output im- pedance will be about the same as for a 1.5 k w resistor (the feedback plus gain resistors) in parallel with a 13 pf capacitor (due to the output) and the input to output isolation will be bet- ter than 50 db at 10 mhz. leaving the disable pin disconnected (floating) will leave the part in the enabled state. in cases where the amplifier is driving a high impedance load, the input to output isolation will decrease significantly if the in- put signal is greater than about 1.2 v peak to peak. the isola- tion can be restored to the 50 db level by adding a dummy load (say 150 w ) at the amplifier output. this will attenuate the feedthrough signal. (this is not an issue for multiplexer applica- tions where the outputs of multiple adel2020s are tied to- gether as long as at least one channel is in the on state.) the input impedance of the disable pin is about 35 k w in parallel with a few pf. when grounded, about 50 m a flows out of the disable pin for 5 v supplies. break before make operation is guaranteed by design. if driven by standard cmos logic, the disable time (until the output is high impedance), is about 100 ns and the enable time (to low impedance output) is about 160 ns. since it has an internal pull- up resistor of about 35 k w , the adel2020 can be used with open drain logic as well. in this case, the enable time is in- creased to about 1 m s. if there is a nonzero voltage present on the amplifiers output at the time it is switched to the disabled state, some additional decay time will be required for the output voltage to relax to zero. the total time for the output to go to zero will generally be about 250 ns and is somewhat dependent on the load impedance.
adel2020 rev. a C10C buffers ultralow distortion ad9620 ad9630 buf-03 fet input fast ad843 ad845 op44 low noise (< 10 nv/ ? hz) ad810 ad811 ad829 video ad810 ad811 ad817 ad818 ad844 op64 op467 (quad) ad829 ad830 op160 adel2020 low power (i supply < 10 ma) high slew rate ( 3 1000 v/?) ad810 ad844 fet input op44 general purpose ad817 ad818 ad847 ad848 precision ad846 low voltage noise ad810 ad829 op64 op467 (quad) ad849 ad827 (dual) op467 (quad) adel2020 op160 op260 (dual) high slew rate ( 3 1000 v/?) ad810 ad811 ad844 ad9617 ad9618 op160 op260 (dual) specified 0.01% settling ad811 ad817 ad818 ad840 ad841 ad842 difference amplifier ad830 disable feature ad810 op64 op160 adel2020 ad843 ad845 ad846 ad847 op467 (quad) high speed slew rate 3 100 v/? operational amplifiers adel2020
adel2020 rev. a C11C outline dimensions dimensions shown in inches and (mm). plastic mini-dip (n) package 0.011 ?.003 (0.28 ?.08) 0.30 (7.62) ref 15 0 pin 1 4 5 8 1 0.25 (6.35) 0.31 (7.87) 0.10 (2.54) bsc seating plane 0.035 ?.01 (0.89 ?.25) 0.18 ?.03 (4.57 ?.76) 0.033 (0.84) nom 0.018 ?.003 (0.46 ?.08) 0.125 (3.18) min 0.165 ?.01 (4.19 ?.25) 0.39 (9.91) max 20-lead wide body soic (r) package pin 1 0.300 (7.60) 0.292 (7.40) 11 10 1 20 0.419 (10.65) 0.394 (10.00) 0.010 (0.254) 0.050 (1.27) 0.016 (0.40) 0.020 (0.51) x 45 chamf 8 0 0.512 (13.00) 0.496 (12.60) 0.104 (2.64) 0.093 (2.36) 0.011 (0.28) 0.004 (0.10) 0.019 (0.48) 0.014 (0.36) 0.050 (1.27) bsc 0.450 (11.43) all brand or product names mentioned are trademarks or registered trademarks of their respective holders.
c1727C24C10/92 printed in u.s.a.

▲Up To Search▲

Price & Availability of ADEL2020AR-20

	To Download ADEL2020AR-20 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .